;ANGELS loader, Ripped from their “Dragon Breed” crack
;cleaned up + altered to let you set MFM buffer address -WK

;REMEMBER TO SET mfmptr TO POINT TO YOUR MFM BUFFER ADDRESS!
Angels_load:
movem.l d0-a6,-(a7) ; IN: a0=load addr, d0=filenumber
lea filetable(pc),a5
lsl.w #3,d0
move.l 4(a5,d0.w),d1 ; filesize
move.l (a5,d0.w),d0 ; offset
lea unk_705C8,a2
lea ($BFD100).l,a1
movea.l a0,a5
adda.l d1,a5 ; a5=load addr+filesize (for comparison later)
moveq #0,d3
moveq #0,d4
move.l d0,d5
divu.w #$1600,d5
move.w d5,d3
swap d5
move.w d5,d4
bsr.s sub_70326
bsr.w sub_703C8
bsr.w sub_7043C
bsr.w sub_70422
movem.l (a7)+,d0-a6
rts

sub_70326:
move.b #$7D,(a1)
nop
nop
bclr #3,(a1)
bsr.s sub_70338
clr.l d0
rts

sub_70338:
move.l d1,-(a7)
move.w #$8BD4,d1
bra.s loc_70344

sub_70340:
move.w #$864,d1

loc_70344:
move.b #8,$D00(a1)
move.b d1,$300(a1)
lsr.w #8,d1
move.b d1,$400(a1)

loc_70354:
btst #0,$C00(a1)
beq.s loc_70354
move.l (a7)+,d1
rts

sub_70360:
btst #4,($BFE001).l
beq.s loc_7037C
bset #1,(a1)
bsr.s sub_703AC

loc_70370:
btst #5,($BFE001).l
bne.s loc_70370
bra.s sub_70360

loc_7037C:
clr.b (a2)
rts

sub_70380:
move.b (a2),d0
addq.l #1,d0
move.b d0,(a2)
btst #0,d0
bne.s loc_703A6
bclr #1,(a1)
bsr.s sub_703AC

loc_70392:
btst #5,($BFE001).l
bne.s loc_70392
bset #2,(a1)

loc_703A0:
bsr.w sub_70338
rts

loc_703A6:
bclr #2,(a1)
bra.s loc_703A0

sub_703AC:
bclr #0,(a1)
nop
nop
bset #0,(a1)
bsr.w sub_70340

loc_703BC:
btst #5,($BFE001).l
bne.s loc_703BC
rts

sub_703C8:
movem.l d1-d2,-(a7)
cmpi.b #-1,(a2)
bne.s loc_703D8
bsr.w sub_70360
clr.b (a2)

loc_703D8:
clr.l d1
clr.l d2
move.b (a2),d1
move.b d3,d2
bset #2,(a1)
btst #0,d3
beq.s loc_703F2
bclr #2,(a1)
bsr.w sub_70338

loc_703F2:
lsr.w #1,d2
lsr.w #1,d1
sub.w d1,d2
bcs.s loc_70408
bhi.s loc_703FE
bra.s loc_7041A

loc_703FE:
bclr #1,(a1)
bsr.w sub_70338
bra.s loc_70412

loc_70408:
neg.w d2
bset #1,(a1)
bsr.w sub_70338

loc_70412:
bsr.w sub_703AC
subq.w #1,d2
bne.s loc_70412

loc_7041A:
move.b d3,(a2)
movem.l (a7)+,d1-d2
rts

sub_70422:
move.b #-3,(a1)
nop
nop
bclr #3,(a1)
nop
nop
bset #3,(a1)
bsr.w sub_70338
rts

sub_7043C:
moveq #4,d2

loc_7043E:
bsr.s sub_70488
tst.l d0
bne.s loc_7045A
bsr.w sub_70508
tst.l d0
bne.s loc_7045A
cmpa.l a0,a5
ble.s locret_70458
bsr.w sub_70380
moveq #4,d2
bra.s loc_7043E

locret_70458:
rts

loc_7045A:
bclr #1,(a1)
bsr.w sub_70338
bsr.w sub_703AC
bsr.w sub_70338
bset #1,(a1)
bsr.w sub_70338
bsr.w sub_703AC
bsr.w sub_70338
subq.l #1,d2
bne.s sub_7043C

loc_7047E:
move.w d0,($DFF180).l
subq.w #1,d0
bra.s loc_7047E

sub_70488:
movem.l d1-d2/a0-a2,-(a7)

loc_7048C:
lea ($DFF000).l,a6
; movea.l #$2000,a1 ;MFM Buff
move.l mfmptr(pc),d1
move.l d1,$20(a6)
; move.l a1,$20(a6)
move.w #$8010,$96(a6)
move.w #$7F00,$9E(a6)
move.w #$9500,$9E(a6)
move.w #$4000,$24(a6)
move.w #$4489,$7E(a6)

loc_704BA:
btst #5,($BFE001).l
bne.s loc_704BA
move.w #$9980,$24(a6)
move.w #$9980,$24(a6)
move.l #$20000,d1
move.w #2,$9C(a6)

loc_704DC:
move.w $1E(a6),d2
btst #1,d2
bne.s loc_704EE
subq.l #1,d1
bne.s loc_704DC
moveq #-1,d0
bra.s loc_704F6

loc_704EE:
moveq #0,d0
cmpi.w #$4489,(a1)
bne.s loc_7048C

loc_704F6:
move.w #$4000,$24(a6)
move.w #$10,$96(a6)
movem.l (a7)+,d1-d2/a0-a2
rts

sub_70508:
movem.l d1-d3/d5-d7/a1-a6,-(a7)
movea.l a0,a2
movea.l a0,a3
adda.l d4,a3
movea.l a0,a4
; movea.l #$2000,a1 ;MFM Buff
move.l mfmptr(pc),d5
move.l d5,a1
cmpi.w #$4489,(a1)
bne.s loc_70576
moveq #$A,d5

loc_70522:
bsr.s sub_7057C
tst.l d0
bne.s loc_7056A
moveq #$7F,d6

loc_7052A:
move.l $200(a1),d1
move.l (a1)+,d0
eor.l d0,d2
eor.l d1,d2
bsr.w sub_705B6
cmpa.l a3,a2
bge.s loc_70540
addq.l #4,a2
bra.s loc_7054C

loc_70540:
movea.l a2,a6
addq.l #4,a2
suba.l d4,a6
cmpa.l a5,a6
bge.s loc_7054C
move.l d0,(a6)+

loc_7054C:
dbf d6,loc_7052A
andi.l #$55555555,d2
cmp.l d2,d7
bne.s loc_70576
dbf d5,loc_70522
move.l #$1600,d0
sub.l d4,d0
adda.l d0,a0
clr.l d0

loc_7056A:
tst.l d0
bne.s loc_70576
clr.l d4

loc_70570:
movem.l (a7)+,d1-d3/d5-d7/a1-a6
rts

loc_70576:
movea.l a4,a0
moveq #-1,d0
bra.s loc_70570

sub_7057C:
move.w #$4489,d0

loc_70580:
cmp.w (a1)+,d0
bne.s loc_70580
cmp.w (a1),d0
bne.s loc_7058A
addq.l #2,a1

loc_7058A:
move.l $30(a1),d0
move.l $34(a1),d1
bsr.s sub_705B6
move.l d0,d7
move.l (a1),d0
move.l 4(a1),d1
bsr.s sub_705B6
lsr.w #8,d0
lea $38(a1),a1
add.w d0,d0
asl.w #8,d0
lea (a4,d0.w),a2
moveq #0,d0
clr.l d2
rts

moveq #-1,d0
rts

sub_705B6:
asl.l #1,d0
andi.l #$AAAAAAAA,d0
andi.l #$55555555,d1
or.l d1,d0
rts

; —————————————————————————
unk_705C8: dc.b 0
dc.b 0
mfmptr: dc.l $0 ;pointer to MFM buffer
Angels_loadend:
filetable: dc.l 0
dc.l 0
dc.l $2C00
dc.l $91AC
dc.l $BDAC
dc.l $85DC
dc.l $14388
dc.l $70F4
dc.l $1B47C
dc.l $60A4
dc.l $21520
dc.l $67AC
dc.l $27CCC
dc.l $686C
dc.l $2E538
dc.l $6958
dc.l $34E90
dc.l $4200
dc.l $39090
dc.l $3978
dc.l $3CA08
dc.l $C6D0
dc.l $490D8
dc.l $46F0
dc.l $4D7C8
dc.l $7FF0
dc.l $557B8
dc.l $18E0
dc.l $57098
dc.l $7D20
dc.l $5EDB8
dc.l $44FE0
dc.l $A3D98
dc.l $2C0C
dc.l $A69A4
dc.l $7D00

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offline 4 hours

mus@shi9

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Comments: 1160Publics: 2778Registration: 06-03-2017

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StingRay
16 years ago

I bet it was messed up by M9 on purpose. He just wanted to check if we are attentive readers. :p

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WayneK
16 years ago

Of course that line should be "divu.w #$1600,d5".
Seems to have been messed up in the HTML, I assure you it was there when I sent it to flashtro 🙂

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StingRay
16 years ago

Hmm, what’s that "divu.w #00,d5" doing there? 😉 I don’t see the "division by zero" exception vector patched anywhere. 😀

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mr.spiv
16 years ago

Heh.. _not_ blaming you. That just came to my mind when checking your nice rips again.

0
WayneK
16 years ago

Hey, I just ripped it, if it’s badly coded it’s not my fault 🙂 As usual, it comes with no warranty or tech support!

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mr.spiv
16 years ago

Many loaders (like this one also I think) rely _only_ on the DSKRDY bit to check when the drive rotates at the correct speed and thus is ready for further stuff. There were drives, especially external ones, that never cleared this bit. Of cource 99.9999% of loaders just hanged, which was most annoying. HW manual says that one could also just wait for 500ms after turning on the drive. Only few loaders out there had the combination of both DSKRDY + 500ms waiting.

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