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ForumsCodeASMVBR RSS Documentation?!? Which documentation???

 

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I'm looking for documentation on the VBR. For example, $6c is for vertical blank. Where can the documentation on VBR offsets be found?

Uncle Google found bazillion honorable mentions of the VBR, but no specification.
 

TStorm

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Isn't Vector Base Register part of 68010+ CPU, as any general 32-bit register (Dx/Ax)? Ofc, it's only purpose was to hold the base address of the vector exception table, as 68010+ allowed it to be located anywhere in RAM, not only at $0 as on 68000.
 

pmc

Annatar: What TStorm said.

The VBR is just an offset address. On vanilla 68000, there is no VBR. This is the same as saying: on 68000 "the VBR is always at location 0" but on processors above, the location of the VBR is relocatable.

So, on 68000 the pointer to the location of the VBI interrupt handler is at $6c ie. 0 + $6c

On processors above, the same pointer will be at VBR address + $6c

Hope that helps :)
 

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OK, fair enough. Can anyone confirm or deny that $6c is level 3 IRQ, because if that is the case, it is trivial to calculate which offsets the rest of the IRQ's have.
 

pmc

Level 3 interrupt, yes
 

TStorm

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http://wiki.pegasos.hu/index.php/Amiga_Machine_Language_%28Chapter_8%29
$064-$083 Level 1-7 interrupt.

So, $6c is Level3.
 

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Yep, that's what I needed, thanks guys!

I was looking through some code I wrote 20 years ago, trying to figure out what the hell I was doing back then, and then I stumbled upon $6c(a0), and the light bulb went off: VBR! *DING* *DING* *DING*!

Except I wasn't sure if I was trying to do a level 3 or a level 6 (the code wasn't finished).